Designing high-performance, power-efficient NoCs with embedded silicon-in-silica nanophotonics

On-chip electrical links exhibit large energy-to-bandwidth costs, whereas on-chip nanophotonics, which attain high throughput, yet energy-efficient communication, have emerged as an alternative interconnect in multicore chips. Here we consider silicon nanophotonic components that are embedded completely within the silica (SiO₂) substrate as opposed to existing die on-surface silicon nanophotonics. As nanophotonic components now reside subsurface, within the silica substrate, non-obstructive interconnect geometries offering higher network throughput can be implemented. First, we show using detailed simulations based on commercial tools that such Silicon-in-Silica (SiS) structures are feasible, and then demonstrate our proof of concept by utilizing a SiS-based mesh-interconnected topology with augmented diagonal optical channels that provides both higher effective throughput and throughput-to-power ratio versus prior-art. Copyright is held by the owner/author(s).