TY - GEN
T1 - Detection, diagnosis, and repair of faults in memristor-based memories
AU - Kannan, Sachhidh
AU - Karimi, Naghmeh
AU - Karri, Ramesh
AU - Sinanoglu, Ozgur
PY - 2014
Y1 - 2014
N2 - Memristors are an attractive option for use in future memory architectures due to their non-volatility, high density and low power operation. Notwithstanding these advantages, memristors and memristor-based memories are prone to high defect densities due to the non-deterministic nature of nanoscale fabrication. The typical approach to fault detection and diagnosis in memories entails testing one memory cell at a time. This is time consuming and does not scale for the dense, memristor-based memories. In this paper, we integrate solutions for detecting and locating faults in memristors, and ensure post-silicon recovery from memristor failures. We propose a hybrid diagnosis scheme that exploits sneak-paths inherent in crossbar memories, and uses March testing to test and diagnose multiple memory cells simultaneously, thereby reducing test time. We also provide a repair mechanism that prevents faults in the memory from being activated. The proposed schemes enable and leverage sneak paths during fault detection and diagnosis modes, while still maintaining a sneak-path free crossbar during normal operation. The proposed hybrid scheme reduces fault detection and diagnosis time by ∼44%, compared to traditional March tests, and repairs the faulty cell with minimal overhead.
AB - Memristors are an attractive option for use in future memory architectures due to their non-volatility, high density and low power operation. Notwithstanding these advantages, memristors and memristor-based memories are prone to high defect densities due to the non-deterministic nature of nanoscale fabrication. The typical approach to fault detection and diagnosis in memories entails testing one memory cell at a time. This is time consuming and does not scale for the dense, memristor-based memories. In this paper, we integrate solutions for detecting and locating faults in memristors, and ensure post-silicon recovery from memristor failures. We propose a hybrid diagnosis scheme that exploits sneak-paths inherent in crossbar memories, and uses March testing to test and diagnose multiple memory cells simultaneously, thereby reducing test time. We also provide a repair mechanism that prevents faults in the memory from being activated. The proposed schemes enable and leverage sneak paths during fault detection and diagnosis modes, while still maintaining a sneak-path free crossbar during normal operation. The proposed hybrid scheme reduces fault detection and diagnosis time by ∼44%, compared to traditional March tests, and repairs the faulty cell with minimal overhead.
KW - Memory
KW - Memristor
KW - Sneak-paths
KW - Testing
UR - http://www.scopus.com/inward/record.url?scp=84901914119&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84901914119&partnerID=8YFLogxK
U2 - 10.1109/VTS.2014.6818762
DO - 10.1109/VTS.2014.6818762
M3 - Conference contribution
AN - SCOPUS:84901914119
SN - 9781479926114
T3 - Proceedings of the IEEE VLSI Test Symposium
BT - Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014
PB - IEEE Computer Society
T2 - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014
Y2 - 13 April 2014 through 17 April 2014
ER -