Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter

Tuka Al-Hanai; Thuraya Al-Hanaei; Sreenivasappa B. Veeranna; Abdul R. Beig

doi:10.1109/IEEEGCC.2011.5752628

Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter

Tuka Al-Hanai, Thuraya Al-Hanaei, Sreenivasappa B. Veeranna, Abdul R. Beig

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper proposes a fifteen level H-Bridge cascaded multilevel inverter with fundamental frequency switching for low power applications such as solar powered power supplies, battery powered standby power supplies. The effect of the variation of gate pulse on the performance of the inverter for different conditions of gate pulse variation is studied and simulation results are presented. Experimental implementation of gate pulse generation on a low cost FPGA is presented. The results presented in this paper are useful in designing the inverter, determining the control range of the inverter for the reliable and stable closed loop and fault tolerant operation of the inverter.

Original language	English (US)
Title of host publication	2011 IEEE GCC Conference and Exhibition, GCC
Pages	85-88
Number of pages	4
DOIs	https://doi.org/10.1109/IEEEGCC.2011.5752628
State	Published - 2011
Event	2011 IEEE GCC Conference and Exhibition, GCC 2011 - Dubai, United Arab Emirates Duration: Feb 19 2011 → Feb 22 2011

Publication series

Name	2011 IEEE GCC Conference and Exhibition, GCC 2011

Conference

Conference	2011 IEEE GCC Conference and Exhibition, GCC 2011
Country/Territory	United Arab Emirates
City	Dubai
Period	2/19/11 → 2/22/11

Keywords

Cascade H-Bridge inverter
THD
voltage source inverter

ASJC Scopus subject areas

Hardware and Architecture
Signal Processing
Control and Systems Engineering
Electrical and Electronic Engineering

Access to Document

10.1109/IEEEGCC.2011.5752628

Cite this

Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter. / Al-Hanai, Tuka; Al-Hanaei, Thuraya; Veeranna, Sreenivasappa B. et al.
2011 IEEE GCC Conference and Exhibition, GCC. 2011. p. 85-88 5752628 (2011 IEEE GCC Conference and Exhibition, GCC 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Al-Hanai, T, Al-Hanaei, T, Veeranna, SB & Beig, AR 2011, Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter. in 2011 IEEE GCC Conference and Exhibition, GCC., 5752628, 2011 IEEE GCC Conference and Exhibition, GCC 2011, pp. 85-88, 2011 IEEE GCC Conference and Exhibition, GCC 2011, Dubai, United Arab Emirates, 2/19/11. https://doi.org/10.1109/IEEEGCC.2011.5752628

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title = "Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter",

abstract = "This paper proposes a fifteen level H-Bridge cascaded multilevel inverter with fundamental frequency switching for low power applications such as solar powered power supplies, battery powered standby power supplies. The effect of the variation of gate pulse on the performance of the inverter for different conditions of gate pulse variation is studied and simulation results are presented. Experimental implementation of gate pulse generation on a low cost FPGA is presented. The results presented in this paper are useful in designing the inverter, determining the control range of the inverter for the reliable and stable closed loop and fault tolerant operation of the inverter.",

keywords = "Cascade H-Bridge inverter, THD, voltage source inverter",

author = "Tuka Al-Hanai and Thuraya Al-Hanaei and Veeranna, {Sreenivasappa B.} and Beig, {Abdul R.}",

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doi = "10.1109/IEEEGCC.2011.5752628",

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AU - Al-Hanai, Tuka

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AU - Beig, Abdul R.

PY - 2011

Y1 - 2011

N2 - This paper proposes a fifteen level H-Bridge cascaded multilevel inverter with fundamental frequency switching for low power applications such as solar powered power supplies, battery powered standby power supplies. The effect of the variation of gate pulse on the performance of the inverter for different conditions of gate pulse variation is studied and simulation results are presented. Experimental implementation of gate pulse generation on a low cost FPGA is presented. The results presented in this paper are useful in designing the inverter, determining the control range of the inverter for the reliable and stable closed loop and fault tolerant operation of the inverter.

AB - This paper proposes a fifteen level H-Bridge cascaded multilevel inverter with fundamental frequency switching for low power applications such as solar powered power supplies, battery powered standby power supplies. The effect of the variation of gate pulse on the performance of the inverter for different conditions of gate pulse variation is studied and simulation results are presented. Experimental implementation of gate pulse generation on a low cost FPGA is presented. The results presented in this paper are useful in designing the inverter, determining the control range of the inverter for the reliable and stable closed loop and fault tolerant operation of the inverter.

KW - Cascade H-Bridge inverter

KW - THD

KW - voltage source inverter

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BT - 2011 IEEE GCC Conference and Exhibition, GCC

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Y2 - 19 February 2011 through 22 February 2011

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Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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