Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter

Tuka Al-Hanai, Thuraya Al-Hanaei, Sreenivasappa B. Veeranna, Abdul R. Beig

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes a fifteen level H-Bridge cascaded multilevel inverter with fundamental frequency switching for low power applications such as solar powered power supplies, battery powered standby power supplies. The effect of the variation of gate pulse on the performance of the inverter for different conditions of gate pulse variation is studied and simulation results are presented. Experimental implementation of gate pulse generation on a low cost FPGA is presented. The results presented in this paper are useful in designing the inverter, determining the control range of the inverter for the reliable and stable closed loop and fault tolerant operation of the inverter.

Original languageEnglish (US)
Title of host publication2011 IEEE GCC Conference and Exhibition, GCC
Pages85-88
Number of pages4
DOIs
StatePublished - 2011
Event2011 IEEE GCC Conference and Exhibition, GCC 2011 - Dubai, United Arab Emirates
Duration: Feb 19 2011Feb 22 2011

Publication series

Name2011 IEEE GCC Conference and Exhibition, GCC 2011

Conference

Conference2011 IEEE GCC Conference and Exhibition, GCC 2011
CountryUnited Arab Emirates
CityDubai
Period2/19/112/22/11

Keywords

  • Cascade H-Bridge inverter
  • THD
  • voltage source inverter

ASJC Scopus subject areas

  • Hardware and Architecture
  • Signal Processing
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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