Efficient resource utilization for an extensible processor through dynamic instruction set adaptation

Lars Bauer, Muhammad Shafique, Jörg Henkel

Research output: Contribution to journalArticlepeer-review

Abstract

State-of-the-art application-specific instruction set processors (ASIPs) allow the designer to define individual prefabrication customizations, thus improving the degree of specialization towards the actual application requirements, e.g., the computational hot spots. However, only a subset of hot spots can be targeted to keep the ASIP within a reasonable size. We propose a modular Special Instruction composition with multiple implementation possibilities per Special Instruction, compile-time embedded instructions to trigger a run-time adaptation of the instruction set, and a run-time system that dynamically selects an appropriate variation of the instruction set, i.e., a situation-dependent beneficial implementation for each Special Instruction. We thereby achieve a better efficiency of resource usage of up to 3.0× (average 1.4×) compared with current state-of-the-art ASIPs, resulting in a 3.1×(average 1.4×) improved application performance (compared with a general purpose processor up to 25.7× and average 17.6x).

Original languageEnglish (US)
Article number4629342
Pages (from-to)1295-1308
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume16
Issue number10
DOIs
StatePublished - Oct 2008

Keywords

  • Application-specific instruction set processor (ASIP)
  • Extensible processor
  • Modular Special Instructions
  • Reconfigurable architecture
  • RISPP
  • Rotating instruction set processing platform
  • Run-time adaptation

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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