TY - GEN
T1 - Enabling multi-layer cyber-security assessment of Industrial Control Systems through Hardware-In-The-Loop testbeds
AU - Keliris, Anastasis
AU - Konstantinou, Charalambos
AU - Tsoutsos, Nektarios Georgios
AU - Baiad, Raghad
AU - Maniatakos, Michail
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/3/7
Y1 - 2016/3/7
N2 - Industrial Control Systems (ICS) are under modernization towards increasing efficiency, reliability, and controllability. Despite the numerous benefits of interconnecting ICS components, the wide adoption of Information Technologies (IT) has introduced new security challenges and vulnerabilities to industrial processes, previously obscured by the systems' custom designs. Towards securing the backbone of critical infrastructure, selection of the proper assessment environment for performing cyber-security assessments is crucial. In this paper, we present a layered analysis of vulnerabilities and threats in ICS components, that identifies the need for including real hardware components in the assessment environment. Moreover, we advocate the suitability of Hardware-In-The-Loop testbeds for ICS cyber-security assessment and present their advantages over other assessment environments.
AB - Industrial Control Systems (ICS) are under modernization towards increasing efficiency, reliability, and controllability. Despite the numerous benefits of interconnecting ICS components, the wide adoption of Information Technologies (IT) has introduced new security challenges and vulnerabilities to industrial processes, previously obscured by the systems' custom designs. Towards securing the backbone of critical infrastructure, selection of the proper assessment environment for performing cyber-security assessments is crucial. In this paper, we present a layered analysis of vulnerabilities and threats in ICS components, that identifies the need for including real hardware components in the assessment environment. Moreover, we advocate the suitability of Hardware-In-The-Loop testbeds for ICS cyber-security assessment and present their advantages over other assessment environments.
UR - http://www.scopus.com/inward/record.url?scp=84996743271&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84996743271&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2016.7428063
DO - 10.1109/ASPDAC.2016.7428063
M3 - Conference contribution
AN - SCOPUS:84996743271
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 511
EP - 518
BT - 2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016
Y2 - 25 January 2016 through 28 January 2016
ER -