Engineering crossbar based emerging memory technologies

Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Emerging Resistive Random Access Memories (RRAM) devices are an attractive option for future memory architectures due to their low-power and high density. However, their capacity is limited by sneak paths and the sensitivity of the sense amplifiers (SA). We develop a framework to maximize the capacity of RRAM memories by modeling the interactions between memory capacity, sneak paths, device parameters, and the sense amplifier. The framework explores the design space of the memory by considering different read/write mechanisms, sneak path elimination techniques, and multi-level storage.

Original languageEnglish (US)
Title of host publication2012 IEEE 30th International Conference on Computer Design, ICCD 2012
Pages478-479
Number of pages2
DOIs
StatePublished - 2012
Event2012 IEEE 30th International Conference on Computer Design, ICCD 2012 - Montreal, QC, Canada
Duration: Sep 30 2012Oct 3 2012

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404

Other

Other2012 IEEE 30th International Conference on Computer Design, ICCD 2012
CountryCanada
CityMontreal, QC
Period9/30/1210/3/12

Keywords

  • Resistive RAM
  • emerging memory technologies
  • memory design
  • optimization

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Kannan, S., Rajendran, J., Karri, R., & Sinanoglu, O. (2012). Engineering crossbar based emerging memory technologies. In 2012 IEEE 30th International Conference on Computer Design, ICCD 2012 (pp. 478-479). [6378682] (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors). https://doi.org/10.1109/ICCD.2012.6378682