TY - GEN
T1 - Exploring eFPGA-based Redaction for IP Protection
AU - Bhandari, Jitendra
AU - Moosa, Abdul Khader Thalakkattu
AU - Tan, Benjamin
AU - Pilato, Christian
AU - Gore, Ganesh
AU - Tang, Xifan
AU - Temple, Scott
AU - Gaillardon, Pierre Emmanuel
AU - Karri, Ramesh
N1 - Publisher Copyright:
©2021 IEEE
PY - 2021
Y1 - 2021
N2 - Recently, eFPGA-based redaction has been proposed as a promising solution for hiding parts of a digital design from untrusted entities, where legitimate end-users can restore functionality by loading the withheld bitstream after fabrication. However, when deciding which parts of a design to redact, there are a number of practical issues that designers need to consider, including area and timing overheads, as well as security factors. Adapting an open-source FPGA fabric generation flow, we perform a case study to explore the trade-offs when redacting different modules of open-source intellectual property blocks (IPs) and explore how different parts of an eFPGA contribute to the security. We provide new insights into the feasibility and challenges of using eFPGA-based redaction as a security solution.
AB - Recently, eFPGA-based redaction has been proposed as a promising solution for hiding parts of a digital design from untrusted entities, where legitimate end-users can restore functionality by loading the withheld bitstream after fabrication. However, when deciding which parts of a design to redact, there are a number of practical issues that designers need to consider, including area and timing overheads, as well as security factors. Adapting an open-source FPGA fabric generation flow, we perform a case study to explore the trade-offs when redacting different modules of open-source intellectual property blocks (IPs) and explore how different parts of an eFPGA contribute to the security. We provide new insights into the feasibility and challenges of using eFPGA-based redaction as a security solution.
KW - Embedded FPGA
KW - Hardware Security
KW - Redaction
UR - http://www.scopus.com/inward/record.url?scp=85119577966&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85119577966&partnerID=8YFLogxK
U2 - 10.1109/ICCAD51958.2021.9643548
DO - 10.1109/ICCAD51958.2021.9643548
M3 - Conference contribution
AN - SCOPUS:85119577966
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
BT - 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021
Y2 - 1 November 2021 through 4 November 2021
ER -