FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators

Computer Science

• Dynamic Routing 100%
• Convolutional Neural Network 100%
• Design-Space Exploration 100%
• Energy Efficient 100%
• Hardware Accelerator 100%
• Efficient Implementation 50%
• Performance Improvement 50%
• Energy Efficiency 50%
• Processing Element 50%
• Genetic Algorithm 50%
• Clock Cycle 50%
• Image Classification 50%
• Hardware Architecture 50%
• Energy Consumption 50%
• Spatial Relationship 50%
• Coupling Coefficient 50%
• Memory Access 50%
• Iterative Algorithm 50%
• Network Inference 50%
• Activation Function 50%
• Data Reuse 50%
• Non-Dominated Sorting Genetic Algorithm II 50%

Keyphrases

• Latency Efficient 100%