TY - GEN
T1 - FPGA Trust Zone
T2 - 34th IEEE International Conference on Computer Design, ICCD 2016
AU - Jyothi, Vinayaka
AU - Thoonoli, Manasa
AU - Stern, Richard
AU - Karri, Ramesh
N1 - Funding Information:
The authors are with NYU Center for Cyber Security (CCS). This work was supported in part by National Science Foundation grant CCF-1319841 and CCS-Abu Dhabi. We thank Prof. Haldun Hadimioglu for providing us with a large number of Nexys-4 FPGAs used in our experiments.
Publisher Copyright:
© 2016 IEEE.
PY - 2016/11/22
Y1 - 2016/11/22
N2 - This paper proposes a novel methodology FPGA Trust Zone (FTZ) to incorporate security into the design cycle to detect and isolate anomalies such as Hardware Trojans in the FPGA fabric. Anomalies are identified using violation to spatial correlation of process variation in FPGA fabric. Anomalies are isolated using Xilinx Isolation Design Flow (IDF) methodology. FTZ helps identify and partition the FPGA into areas that are devoid of anomalies and thus, assists to run designs securely and reliably even in an anomaly-infected FPGA. FTZ also assists IDF to select trustworthy areas for implementing isolated designs and trusted routes. We demonstrate the effectiveness of FTZ for AES and RC5 designs on Xilinx Virtex-7 and Atrix-7 FPGAs.
AB - This paper proposes a novel methodology FPGA Trust Zone (FTZ) to incorporate security into the design cycle to detect and isolate anomalies such as Hardware Trojans in the FPGA fabric. Anomalies are identified using violation to spatial correlation of process variation in FPGA fabric. Anomalies are isolated using Xilinx Isolation Design Flow (IDF) methodology. FTZ helps identify and partition the FPGA into areas that are devoid of anomalies and thus, assists to run designs securely and reliably even in an anomaly-infected FPGA. FTZ also assists IDF to select trustworthy areas for implementing isolated designs and trusted routes. We demonstrate the effectiveness of FTZ for AES and RC5 designs on Xilinx Virtex-7 and Atrix-7 FPGAs.
UR - http://www.scopus.com/inward/record.url?scp=85006750555&partnerID=8YFLogxK
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U2 - 10.1109/ICCD.2016.7753346
DO - 10.1109/ICCD.2016.7753346
M3 - Conference contribution
AN - SCOPUS:85006750555
T3 - Proceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016
SP - 600
EP - 605
BT - Proceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 2 October 2016 through 5 October 2016
ER -