Framework for fault-tolerant microarchitecture synthesis

Ramesh Karri, Alex Orailogly

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The trend towards VLSI implementation of crucial tasks in life-critical, mission-critical, and safety-critical applications (such as automobile/process control systems and medical instrumentation) is stimulating the need for on-chip fault-tolerance. The growing demand for quality and fault-tolerance (in addition to speed and reduced area), coupled with the inherent unreliability attendant upon VLSI, has elevated the design of fault-tolerant VLSI systems into a research problem of practical relevance. In this paper, we present a framework that subsumes algorithms for synthesizing self-recovering, fault-secure, and reliable microarchitectures.

Original languageEnglish (US)
Title of host publicationProceedings of the Custom Integrated Circuits Conference
PublisherPubl by IEEE
Pages5.6.1.-5.6.4
ISBN (Print)0780308263
StatePublished - 1993
EventProceedings of the IEEE 1993 Custom Integrated Circuits Conference - San Diego, CA, USA
Duration: May 9 1993May 12 1993

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Other

OtherProceedings of the IEEE 1993 Custom Integrated Circuits Conference
CitySan Diego, CA, USA
Period5/9/935/12/93

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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