TY - GEN
T1 - Hermes
T2 - 32nd IEEE International Conference on Computer Design, ICCD 2014
AU - Iordanou, Costas
AU - Soteriou, Vassos
AU - Aisopos, Konstantinos
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/12/3
Y1 - 2014/12/3
N2 - Networks-on-Chips (NoCs) are experiencing escalating susceptibility to wear-out and reduced reliability, with the risk of becoming the key point of failure in an entire multicore chip. Aiming towards seamless NoC operation in the presence of faulty communication links, in this paper we propose Hermes, a highly-robust, distributed and lightweight fault-tolerant routing algorithm, whose performance degrades gracefully with increasing faulty link counts. Hermes is a deadlock-free hybrid routing algorithm, utilizing load-balancing routing on fault-free paths to sustain high-performance, while providing pre-reconfigured escape path selection in the vicinity of faults. Additionally, Hermes identifies non-communicating network partitions in scenarios where faulty links are topologically densely distributed. An extensive experimental evaluation, including utilizing traffic benchmarks gathered from full-system chip multi-processor simulations, shows that Hermes improves network throughput by up to 3× when compared against prior-art.
AB - Networks-on-Chips (NoCs) are experiencing escalating susceptibility to wear-out and reduced reliability, with the risk of becoming the key point of failure in an entire multicore chip. Aiming towards seamless NoC operation in the presence of faulty communication links, in this paper we propose Hermes, a highly-robust, distributed and lightweight fault-tolerant routing algorithm, whose performance degrades gracefully with increasing faulty link counts. Hermes is a deadlock-free hybrid routing algorithm, utilizing load-balancing routing on fault-free paths to sustain high-performance, while providing pre-reconfigured escape path selection in the vicinity of faults. Additionally, Hermes identifies non-communicating network partitions in scenarios where faulty links are topologically densely distributed. An extensive experimental evaluation, including utilizing traffic benchmarks gathered from full-system chip multi-processor simulations, shows that Hermes improves network throughput by up to 3× when compared against prior-art.
KW - Network-on-chip
KW - chip multi-processor
KW - fault-tolerance
KW - reliability
KW - routing algorithm
UR - http://www.scopus.com/inward/record.url?scp=84919683804&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84919683804&partnerID=8YFLogxK
U2 - 10.1109/ICCD.2014.6974715
DO - 10.1109/ICCD.2014.6974715
M3 - Conference contribution
AN - SCOPUS:84919683804
T3 - 2014 32nd IEEE International Conference on Computer Design, ICCD 2014
SP - 424
EP - 431
BT - 2014 32nd IEEE International Conference on Computer Design, ICCD 2014
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 19 October 2014 through 22 October 2014
ER -