Hierarchical power budgeting for Dark Silicon chips

Muhammad Usman Karim Khan; Muhammad Shafique; Jörg Henkel

doi:10.1109/ISLPED.2015.7273516

Hierarchical power budgeting for Dark Silicon chips

Muhammad Usman Karim Khan, Muhammad Shafique, Jörg Henkel

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The emerging Dark Silicon limitation has led the application designers to carefully consider the available Thermal Design Power (TDP) budgets, hardware resources, and software characteristics. In this paper, we propose a hierarchical scheme for distributing the resources and TDP budget among concurrently executing applications with multi-threaded workloads under throughput constraints. Afterwards, the application-level TDP budget is partitioned among its threads depending upon their workloads, which can then be fine-tuned at run time considering workload variations. We evaluate our scheme for the next-generation, multi-threaded, High Efficiency Video Codec and demonstrate that up to 30.86% higher throughput is achieved compared to the state-of-the-art.

Original language	English (US)
Title of host publication	Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	213-218
Number of pages	6
ISBN (Electronic)	9781467380096
DOIs	https://doi.org/10.1109/ISLPED.2015.7273516
State	Published - Sep 21 2015
Event	20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015 - Rome, Italy Duration: Jul 22 2015 → Jul 24 2015

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
Volume	2015-September
ISSN (Print)	1533-4678

Other

Other	20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015
Country/Territory	Italy
City	Rome
Period	7/22/15 → 7/24/15

Keywords

dark silicon
many-core system
parallel HEVC
power budgeting
resource allocation
Thermal design power

ASJC Scopus subject areas

General Engineering

Access to Document

10.1109/ISLPED.2015.7273516

Cite this

Khan, M. U. K., Shafique, M., & Henkel, J. (2015). Hierarchical power budgeting for Dark Silicon chips. In Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015 (pp. 213-218). Article 7273516 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2015-September). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISLPED.2015.7273516

Hierarchical power budgeting for Dark Silicon chips. / Khan, Muhammad Usman Karim; Shafique, Muhammad; Henkel, Jörg.
Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 213-218 7273516 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2015-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Khan, MUK, Shafique, M & Henkel, J 2015, Hierarchical power budgeting for Dark Silicon chips. in Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015., 7273516, Proceedings of the International Symposium on Low Power Electronics and Design, vol. 2015-September, Institute of Electrical and Electronics Engineers Inc., pp. 213-218, 20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015, Rome, Italy, 7/22/15. https://doi.org/10.1109/ISLPED.2015.7273516

Khan MUK, Shafique M, Henkel J. Hierarchical power budgeting for Dark Silicon chips. In Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 213-218. 7273516. (Proceedings of the International Symposium on Low Power Electronics and Design). doi: 10.1109/ISLPED.2015.7273516

@inproceedings{dd9100f1e0e44411b01a80095e151b28,

title = "Hierarchical power budgeting for Dark Silicon chips",

abstract = "The emerging Dark Silicon limitation has led the application designers to carefully consider the available Thermal Design Power (TDP) budgets, hardware resources, and software characteristics. In this paper, we propose a hierarchical scheme for distributing the resources and TDP budget among concurrently executing applications with multi-threaded workloads under throughput constraints. Afterwards, the application-level TDP budget is partitioned among its threads depending upon their workloads, which can then be fine-tuned at run time considering workload variations. We evaluate our scheme for the next-generation, multi-threaded, High Efficiency Video Codec and demonstrate that up to 30.86% higher throughput is achieved compared to the state-of-the-art.",

keywords = "dark silicon, many-core system, parallel HEVC, power budgeting, resource allocation, Thermal design power",

author = "Khan, {Muhammad Usman Karim} and Muhammad Shafique and J{\"o}rg Henkel",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE. Copyright: Copyright 2016 Elsevier B.V., All rights reserved.; 20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015 ; Conference date: 22-07-2015 Through 24-07-2015",

year = "2015",

month = sep,

day = "21",

doi = "10.1109/ISLPED.2015.7273516",

language = "English (US)",

series = "Proceedings of the International Symposium on Low Power Electronics and Design",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "213--218",

booktitle = "Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015",

}

TY - GEN

T1 - Hierarchical power budgeting for Dark Silicon chips

AU - Khan, Muhammad Usman Karim

AU - Shafique, Muhammad

AU - Henkel, Jörg

PY - 2015/9/21

Y1 - 2015/9/21

N2 - The emerging Dark Silicon limitation has led the application designers to carefully consider the available Thermal Design Power (TDP) budgets, hardware resources, and software characteristics. In this paper, we propose a hierarchical scheme for distributing the resources and TDP budget among concurrently executing applications with multi-threaded workloads under throughput constraints. Afterwards, the application-level TDP budget is partitioned among its threads depending upon their workloads, which can then be fine-tuned at run time considering workload variations. We evaluate our scheme for the next-generation, multi-threaded, High Efficiency Video Codec and demonstrate that up to 30.86% higher throughput is achieved compared to the state-of-the-art.

AB - The emerging Dark Silicon limitation has led the application designers to carefully consider the available Thermal Design Power (TDP) budgets, hardware resources, and software characteristics. In this paper, we propose a hierarchical scheme for distributing the resources and TDP budget among concurrently executing applications with multi-threaded workloads under throughput constraints. Afterwards, the application-level TDP budget is partitioned among its threads depending upon their workloads, which can then be fine-tuned at run time considering workload variations. We evaluate our scheme for the next-generation, multi-threaded, High Efficiency Video Codec and demonstrate that up to 30.86% higher throughput is achieved compared to the state-of-the-art.

KW - dark silicon

KW - many-core system

KW - parallel HEVC

KW - power budgeting

KW - resource allocation

KW - Thermal design power

UR - http://www.scopus.com/inward/record.url?scp=84958522634&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84958522634&partnerID=8YFLogxK

U2 - 10.1109/ISLPED.2015.7273516

DO - 10.1109/ISLPED.2015.7273516

M3 - Conference contribution

AN - SCOPUS:84958522634

T3 - Proceedings of the International Symposium on Low Power Electronics and Design

SP - 213

EP - 218

BT - Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015

Y2 - 22 July 2015 through 24 July 2015

ER -

Hierarchical power budgeting for Dark Silicon chips

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Keywords

ASJC Scopus subject areas

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