Hot-carrier reliability enhancement via input reordering and transistor sizing

Aurobindo Dasgupta, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Hot-carrier effects and electromigration are the two important failure mechanisms that significantly impact the long-term reliability of high-density VLSI ICs. In this paper, we present a probabilistic switch-level method for identifying the most susceptible hot-carrier MOSFETs and improving their hot-carrier reliability using two techniques - (i) reordering of inputs to logic gates and (ii) selective MOSFET sizing. We also show that for a given circuit, the best design in terms of hot-carrier reliability does not necessarily coincide with the best design in terms of power consumption.

Original languageEnglish (US)
Title of host publicationProceedings - Design Automation Conference
PublisherIEEE
Pages819-824
Number of pages6
StatePublished - 1996
EventProceedings of the 1996 33rd Annual Design Automation Conference - Las Vegas, NV, USA
Duration: Jun 3 1996Jun 7 1996

Other

OtherProceedings of the 1996 33rd Annual Design Automation Conference
CityLas Vegas, NV, USA
Period6/3/966/7/96

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

Fingerprint Dive into the research topics of 'Hot-carrier reliability enhancement via input reordering and transistor sizing'. Together they form a unique fingerprint.

  • Cite this

    Dasgupta, A., & Karri, R. (1996). Hot-carrier reliability enhancement via input reordering and transistor sizing. In Proceedings - Design Automation Conference (pp. 819-824). IEEE.