HPRA: A pro-active hotspot-preventive high-performance routing algorithm for Networks-on-Chips

Elena Kakoulli, Vassos Soteriou, Theocharis Theocharides

Research output: Chapter in Book/Report/Conference proceedingConference contribution


The inherent spatio-temporal unevenness of traffic flows in Networks-on-Chips (NoCs) can cause unforeseen, and in cases, severe forms of congestion, known as hotspots. Hotspots reduce the NoC's effective throughput, where in the worst case scenario, the entire network can be brought to an unrecoverable halt as a hotspot(s) spreads across the topology. To alleviate this problematic phenomenon several adaptive routing algorithms employ online load-balancing functions, aiming to reduce the possibility of hotspots arising. Most, however, work passively, merely distributing traffic as evenly as possible among alternative network paths, and they cannot guarantee the absence of network congestion as their reactive capability in reducing hotspot formation(s) is limited. In this paper we present a new pro-active Hotspot-Preventive Routing Algorithm (HPRA) which uses the advance knowledge gained from network-embedded Artificial Neural Network-based (ANN) hotspot predictors to guide packet routing across the network in an effort to mitigate any unforeseen near-future occurrences of hotspots. These ANNs are trained offline and during multicore operation they gather online buffer utilization data to predict about-to-be-formed hotspots, promptly informing the HPRA routing algorithm to take appropriate action in preventing hotspot formation(s). Evaluation results across two synthetic traffic patterns, and traffic benchmarks gathered from a chip multiprocessor architecture, show that HPRA can reduce network latency and improve network throughput up to 81% when compared against several existing state-of-the-art congestion-aware routing functions. Hardware synthesis results demonstrate the efficacy of the HPRA mechanism.

Original languageEnglish (US)
Title of host publication2012 IEEE 30th International Conference on Computer Design, ICCD 2012
Number of pages7
StatePublished - 2012
Event2012 IEEE 30th International Conference on Computer Design, ICCD 2012 - Montreal, QC, Canada
Duration: Sep 30 2012Oct 3 2012

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404


Other2012 IEEE 30th International Conference on Computer Design, ICCD 2012
CityMontreal, QC

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering


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