HW/SW co-design and co-optimizations for deep learning

Alberto Marchisio; Muhammad Abdullah Hanif; Rachmad Vidya Wicaksana Putra; Muhammad Shafique

doi:10.1145/3285017.3285022

HW/SW co-design and co-optimizations for deep learning

Alberto Marchisio, Muhammad Abdullah Hanif, Rachmad Vidya Wicaksana Putra, Muhammad Shafique

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Deep Learning algorithms have been proven to provide state-of-the-art results in many applications but at the cost of a high computational complexity. Therefore, accelerating such algorithms in hardware is highly needed. However, since the computational requirements are growing exponentially along with the accuracy, their demand for hardware resources is significant. To tackle this issue, we propose a methodology, involving both software and hardware, to optimize the Deep Neural Networks (DNNs). We discuss and analyze pruning, approximations through quantization and specialized accelerators for DNN inference. For each phase of the methodology, we provide quantitative comparisons with the existing techniques and hardware platforms.

Original language	English (US)
Title of host publication	Workshop Proceedings - 2018 INTelligent Embedded Systems Architectures and Applications, INTESA 2018
Publisher	Association for Computing Machinery
Pages	13-18
Number of pages	6
ISBN (Electronic)	9781450365987
DOIs	https://doi.org/10.1145/3285017.3285022
State	Published - Oct 4 2018
Event	2018 Workshop on INTelligent Embedded Systems Architectures and Applications, INTESA 2018 - Torino, Italy Duration: Oct 4 2018 → …

Publication series

Name	ACM International Conference Proceeding Series

Conference

Conference	2018 Workshop on INTelligent Embedded Systems Architectures and Applications, INTESA 2018
Country/Territory	Italy
City	Torino
Period	10/4/18 → …

Keywords

Deep Learning
Pruning
Quantization
Systolic Array

ASJC Scopus subject areas

Software
Human-Computer Interaction
Computer Vision and Pattern Recognition
Computer Networks and Communications

Access to Document

10.1145/3285017.3285022

Cite this

HW/SW co-design and co-optimizations for deep learning. / Marchisio, Alberto; Hanif, Muhammad Abdullah; Putra, Rachmad Vidya Wicaksana et al.
Workshop Proceedings - 2018 INTelligent Embedded Systems Architectures and Applications, INTESA 2018. Association for Computing Machinery, 2018. p. 13-18 (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Marchisio, A, Hanif, MA, Putra, RVW & Shafique, M 2018, HW/SW co-design and co-optimizations for deep learning. in Workshop Proceedings - 2018 INTelligent Embedded Systems Architectures and Applications, INTESA 2018. ACM International Conference Proceeding Series, Association for Computing Machinery, pp. 13-18, 2018 Workshop on INTelligent Embedded Systems Architectures and Applications, INTESA 2018, Torino, Italy, 10/4/18. https://doi.org/10.1145/3285017.3285022

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abstract = "Deep Learning algorithms have been proven to provide state-of-the-art results in many applications but at the cost of a high computational complexity. Therefore, accelerating such algorithms in hardware is highly needed. However, since the computational requirements are growing exponentially along with the accuracy, their demand for hardware resources is significant. To tackle this issue, we propose a methodology, involving both software and hardware, to optimize the Deep Neural Networks (DNNs). We discuss and analyze pruning, approximations through quantization and specialized accelerators for DNN inference. For each phase of the methodology, we provide quantitative comparisons with the existing techniques and hardware platforms.",

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AB - Deep Learning algorithms have been proven to provide state-of-the-art results in many applications but at the cost of a high computational complexity. Therefore, accelerating such algorithms in hardware is highly needed. However, since the computational requirements are growing exponentially along with the accuracy, their demand for hardware resources is significant. To tackle this issue, we propose a methodology, involving both software and hardware, to optimize the Deep Neural Networks (DNNs). We discuss and analyze pruning, approximations through quantization and specialized accelerators for DNN inference. For each phase of the methodology, we provide quantitative comparisons with the existing techniques and hardware platforms.

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HW/SW co-design and co-optimizations for deep learning

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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