TY - JOUR
T1 - Identification of synthesis approaches for IP/IC piracy of reversible circuits
AU - Saeed, Samah Mohamed
AU - Mahendran, Nithin
AU - Zulehner, Alwin
AU - Wille, Robert
AU - Karri, Ramesh
N1 - Funding Information:
Alwin Zulehner and Robert Wille are supported by the EU COST Action IC1405. Ramesh Karri is partly funded by NYU/NYU-AD CCS. Authors’ addresses: S. M. Saeed, City College of New York, 160 Convent Ave, New York, NY 10031; email: ssaeed@ ccny.cuny.edu; N. Mahendran, University of Washington, Tacoma, 1900 Commerce St, Tacoma, WA 98402; email: nithin@ uw.edu; A. Zulehner and R. Wille, Johannes Kepler University Linz, Altenbergerstraße 69, 4040 Linz, Austria; emails: {al-win.zulehner, robert.wille}@jku.at; R. Karri, 6 MetroTech Center, Brooklyn, NY 11201; email: [email protected]. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]. © 2019 Association for Computing Machinery. 1550-4832/2019/04-ART23 $15.00 https://doi.org/10.1145/3289392
Funding Information:
Alwin Zulehner and Robert Wille are supported by the EU COST Action IC1405. Ramesh Karri is partly funded by NYU/NYU-AD CCS.
Publisher Copyright:
© 2019 Association for Computing Machinery.
PY - 2019/5
Y1 - 2019/5
N2 - Reversible circuits employ a computational paradigm that is beneficial for several applications, including the design of encoding and decoding devices, low-power design, and emerging applications in quantum computation. However, similarly to conventional logic, reversible circuits are expected to be subject to Intellectual Property/Integrated Circuit piracy. To counteract such attacks, an understanding of how to identify the target function from a reversible circuit is a crucial first step. In contrast to conventional logic, the target function is (implicitly or explicitly) embedded into the reversible circuit. Numerous synthesis approaches have been proposed for this embedding task. To recover the target function embedded in a reversible circuit, one needs to know what synthesis approach has been used to embed the circuit. We propose a machine-learning-based scheme to determine the used reversible synthesis approach based on the telltale signs it leaves in the synthesized reversible circuit. We study the impact of optimizing the synthesis approaches on the telltale signs that they leave. Our analysis shows that the synthesis approaches can be determined in the vast majority of cases even if optimized versions of the synthesis approaches are used.
AB - Reversible circuits employ a computational paradigm that is beneficial for several applications, including the design of encoding and decoding devices, low-power design, and emerging applications in quantum computation. However, similarly to conventional logic, reversible circuits are expected to be subject to Intellectual Property/Integrated Circuit piracy. To counteract such attacks, an understanding of how to identify the target function from a reversible circuit is a crucial first step. In contrast to conventional logic, the target function is (implicitly or explicitly) embedded into the reversible circuit. Numerous synthesis approaches have been proposed for this embedding task. To recover the target function embedded in a reversible circuit, one needs to know what synthesis approach has been used to embed the circuit. We propose a machine-learning-based scheme to determine the used reversible synthesis approach based on the telltale signs it leaves in the synthesized reversible circuit. We study the impact of optimizing the synthesis approaches on the telltale signs that they leave. Our analysis shows that the synthesis approaches can be determined in the vast majority of cases even if optimized versions of the synthesis approaches are used.
KW - BDD
KW - ESOP
KW - IP/IC piracy
KW - Machine-learning-based scheme
KW - QMDD
KW - Reversible logic
KW - Security
KW - TBS
UR - http://www.scopus.com/inward/record.url?scp=85065768133&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85065768133&partnerID=8YFLogxK
U2 - 10.1145/3289392
DO - 10.1145/3289392
M3 - Article
AN - SCOPUS:85065768133
SN - 1550-4832
VL - 15
JO - ACM Journal on Emerging Technologies in Computing Systems
JF - ACM Journal on Emerging Technologies in Computing Systems
IS - 3
M1 - 23
ER -