Instruction scheduling for reliability-aware compilation

Semeen Rehman; Muhammad Shafique; Jörg Henkel

doi:10.1145/2228360.2228601

Instruction scheduling for reliability-aware compilation

Semeen Rehman, Muhammad Shafique, Jörg Henkel

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components. Our reliability-driven instruction scheduler (implemented into the GCC compiler) provides on average a 22% reduction of program failures compared to state-of-the-art.

Original language	English (US)
Title of host publication	Proceedings of the 49th Annual Design Automation Conference, DAC '12
Pages	1292-1300
Number of pages	9
DOIs	https://doi.org/10.1145/2228360.2228601
State	Published - 2012
Event	49th Annual Design Automation Conference, DAC '12 - San Francisco, CA, United States Duration: Jun 3 2012 → Jun 7 2012

Publication series

Name	Proceedings - Design Automation Conference
ISSN (Print)	0738-100X

Other

Other	49th Annual Design Automation Conference, DAC '12
Country/Territory	United States
City	San Francisco, CA
Period	6/3/12 → 6/7/12

Keywords

code generation
dependability
embedded systems
instruction scheduling
instruction vulnerability estimation
reliability
reliability estimation
reliable software
technology scaling

ASJC Scopus subject areas

Computer Science Applications
Control and Systems Engineering
Electrical and Electronic Engineering
Modeling and Simulation

Access to Document

10.1145/2228360.2228601

Cite this

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title = "Instruction scheduling for reliability-aware compilation",

abstract = "An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components. Our reliability-driven instruction scheduler (implemented into the GCC compiler) provides on average a 22% reduction of program failures compared to state-of-the-art.",

keywords = "code generation, dependability, embedded systems, instruction scheduling, instruction vulnerability estimation, reliability, reliability estimation, reliable software, technology scaling",

author = "Semeen Rehman and Muhammad Shafique and J{\"o}rg Henkel",

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doi = "10.1145/2228360.2228601",

language = "English (US)",

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series = "Proceedings - Design Automation Conference",

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AU - Shafique, Muhammad

AU - Henkel, Jörg

PY - 2012

Y1 - 2012

N2 - An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components. Our reliability-driven instruction scheduler (implemented into the GCC compiler) provides on average a 22% reduction of program failures compared to state-of-the-art.

AB - An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components. Our reliability-driven instruction scheduler (implemented into the GCC compiler) provides on average a 22% reduction of program failures compared to state-of-the-art.

KW - code generation

KW - dependability

KW - embedded systems

KW - instruction scheduling

KW - instruction vulnerability estimation

KW - reliability

KW - reliability estimation

KW - reliable software

KW - technology scaling

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U2 - 10.1145/2228360.2228601

DO - 10.1145/2228360.2228601

M3 - Conference contribution

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SN - 9781450311991

T3 - Proceedings - Design Automation Conference

SP - 1292

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BT - Proceedings of the 49th Annual Design Automation Conference, DAC '12

T2 - 49th Annual Design Automation Conference, DAC '12

Y2 - 3 June 2012 through 7 June 2012

ER -

Instruction scheduling for reliability-aware compilation

Abstract

Publication series

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Keywords

ASJC Scopus subject areas

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Cite this