Abstract
We have studied a variety of switch architectures for use in the multistage interconnection network of a shared memory multiprocessor. In this paper, we investigate two techniques for improving network performance in the presence of contention: the use of multiple handshaking signals and the use of message combining. Simulation results are provided for implementation alternatives using switches of varying capabilities, in order to compare the effectiveness of different methods. We show that a practical combining switch design, the two-and-a-half-way combining switch, provides performance equivalent to that of other more expensive designs for systems with up to 1024 PEs.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings of the International Conference on Parallel Processing |
| Publisher | Publ by IEEE |
| Pages | 4-9 |
| Number of pages | 6 |
| ISBN (Print) | 0818656026 |
| State | Published - 1994 |
| Event | Proceedings of the 8th International Parallel Processing Symposium - Cancun, Mex Duration: Apr 26 1994 → Apr 29 1994 |
Publication series
| Name | Proceedings of the International Conference on Parallel Processing |
|---|---|
| ISSN (Print) | 0190-3918 |
Other
| Other | Proceedings of the 8th International Parallel Processing Symposium |
|---|---|
| City | Cancun, Mex |
| Period | 4/26/94 → 4/29/94 |
ASJC Scopus subject areas
- Hardware and Architecture
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Dickey, S., Gottlieb, A., & Liu, Y. S. (1994). Interconnection network switch architectures and combining strategies. In Proceedings of the International Conference on Parallel Processing (pp. 4-9). (Proceedings of the International Conference on Parallel Processing). Publ by IEEE.