Is robust design-for-security robust enough? attack on locked circuits with restricted scan chain access

Nimisha Limaye, Abhrajit Sengupta, Mohammed Nabeel, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The security of logic locking has been called into question by various attacks, especially a Boolean satisfiability (SAT) based attack, that exploits scan access in a working chip. Among other techniques, a robust design-for-security (DFS) architecture was presented to restrict any unauthorized scan access, thereby, thwarting the SAT attack (or any other attack that relies on scan access). Nevertheless, in this work, we successfully break this technique by recovering the secret key despite the lack of scan access. Our security analysis on a few benchmark circuits protected by the robust DFS architecture demonstrates the effectiveness of our attack; on average ?95% of the key bits are correctly recovered, and almost 100% in most cases. To overcome this and other prevailing attacks, we propose a defense by making fundamental changes to the robust DFS technique; the new defense can withstand all logic locking attacks. We observe, on average, lower area overhead (?1.65%) than the robust DFS design (?5.15%), and similar test coverage (?99.88%).

Original languageEnglish (US)
Title of host publication2019 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019 - Digest of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728123509
DOIs
StatePublished - Nov 2019
Event38th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019 - Westin Westminster, United States
Duration: Nov 4 2019Nov 7 2019

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Volume2019-November
ISSN (Print)1092-3152

Conference

Conference38th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019
CountryUnited States
CityWestin Westminster
Period11/4/1911/7/19

Keywords

  • ATPG
  • IP piracy
  • Logic locking
  • SAT attack
  • Scan chain

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

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    Limaye, N., Sengupta, A., Nabeel, M., & Sinanoglu, O. (2019). Is robust design-for-security robust enough? attack on locked circuits with restricted scan chain access. In 2019 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019 - Digest of Technical Papers [8942047] (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; Vol. 2019-November). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCAD45719.2019.8942047