TY - GEN
T1 - ISOMER
T2 - 2013 32nd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2013
AU - Bilal, Rana Muhammad
AU - Hafiz, Rehan
AU - Shafique, Muhammad
AU - Shoaib, Saad
AU - Munawar, Asim
AU - Henkel, Jorg
N1 - Copyright:
Copyright 2014 Elsevier B.V., All rights reserved.
PY - 2013
Y1 - 2013
N2 - Quality system design on dynamic partially reconfigurable platform needs exploration of a vast and multidimensional design space for (1) selection among implementation variants of hardware accelerators, (2) partitioning the reconfigurable fabric, and (3) their placement on the reconfigurable fabric partitions. This paper presents a novel methodology ISOMER for integrated solution of selection, partitioning and placement for performance optimization. Architecture under consideration is a general purpose processor coupled with reconfigurable fabric that can be partitioned in multi-sized partially reconfigurable bins. Our methodology determines performance-efficient partitioning and usage of reconfigurable fabric. Extensive evaluation illustrates that our methodology is scalable and outperforms state-of-the-art techniques for non-partially reconfigurable architectures.
AB - Quality system design on dynamic partially reconfigurable platform needs exploration of a vast and multidimensional design space for (1) selection among implementation variants of hardware accelerators, (2) partitioning the reconfigurable fabric, and (3) their placement on the reconfigurable fabric partitions. This paper presents a novel methodology ISOMER for integrated solution of selection, partitioning and placement for performance optimization. Architecture under consideration is a general purpose processor coupled with reconfigurable fabric that can be partitioned in multi-sized partially reconfigurable bins. Our methodology determines performance-efficient partitioning and usage of reconfigurable fabric. Extensive evaluation illustrates that our methodology is scalable and outperforms state-of-the-art techniques for non-partially reconfigurable architectures.
UR - http://www.scopus.com/inward/record.url?scp=84893401039&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84893401039&partnerID=8YFLogxK
U2 - 10.1109/ICCAD.2013.6691199
DO - 10.1109/ICCAD.2013.6691199
M3 - Conference contribution
AN - SCOPUS:84893401039
SN - 9781479910717
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
SP - 755
EP - 762
BT - 2013 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2013 - Digest of Technical Papers
Y2 - 18 November 2013 through 21 November 2013
ER -