TY - GEN
T1 - KAHRISMA
T2 - Design, Automation and Test in Europe Conference and Exhibition, DATE 2010
AU - Koenig, Ralf
AU - Bauer, Lars
AU - Stripf, Timo
AU - Shafique, Muhammad
AU - Ahmed, Waheed
AU - Becker, Juergen
AU - Henkel, Jörg
N1 - Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.
PY - 2010
Y1 - 2010
N2 - Facing the requirements of next generation applications, current approaches of embedded systems design will soon hit the limit where they may no longer perform efficiently. The unpredictable nature and diverse processing behavior of future applications requires to transgress the barrier of tailor-made, application-/domain-specijic embedded system designs. As a consequence, next generation architectures for embedded systems have to react much more flexible to unforeseeable run-time scenarios. In this paper we present our innovative processor architecture concept KAHRISMA (KArlsruhe's Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array). It tightly integrates coarse- and fine-grained run-time reconfigurable fabrics that can incorporate to realize hardware acceleration for computationally complex algorithms. Furthermore, the fabrics can be combined to realize different Instruction Set Architectures that may execute in parallel. With the help of an encrypted H.264 en-/decoding case study we demonstrate that our novel KAHRISMA architecture will deliver the required flexibility to design future-proof embedded systems that are not limited to a certain computational domain.
AB - Facing the requirements of next generation applications, current approaches of embedded systems design will soon hit the limit where they may no longer perform efficiently. The unpredictable nature and diverse processing behavior of future applications requires to transgress the barrier of tailor-made, application-/domain-specijic embedded system designs. As a consequence, next generation architectures for embedded systems have to react much more flexible to unforeseeable run-time scenarios. In this paper we present our innovative processor architecture concept KAHRISMA (KArlsruhe's Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array). It tightly integrates coarse- and fine-grained run-time reconfigurable fabrics that can incorporate to realize hardware acceleration for computationally complex algorithms. Furthermore, the fabrics can be combined to realize different Instruction Set Architectures that may execute in parallel. With the help of an encrypted H.264 en-/decoding case study we demonstrate that our novel KAHRISMA architecture will deliver the required flexibility to design future-proof embedded systems that are not limited to a certain computational domain.
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U2 - 10.1109/date.2010.5456939
DO - 10.1109/date.2010.5456939
M3 - Conference contribution
AN - SCOPUS:77953118548
SN - 9783981080162
T3 - Proceedings -Design, Automation and Test in Europe, DATE
SP - 819
EP - 824
BT - DATE 10 - Design, Automation and Test in Europe
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 8 March 2010 through 12 March 2010
ER -