Abstract
Logic encryption implements a built-in locking mechanism on integrated circuits (ICs) to prevent reverse engineering and intellectual property (IP) piracy by a malicious foundry and user, and hinder Trojan insertion by a malicious foundry. Since its introduction in 2008, a wide-variety of techniques have been proposed to identify the best places in the design to insert these locks such that (i) an incorrect key results in an incorrect design and (ii) an attacker cannot identify the secret key. Furthermore, conventional testing of chips with logic encryption may help an attacker break logic encryption techniques. In this chapter, we will explain how logic encryption can defeat different types of attacks in the IC supply chains and protocols to aid logic encryption. The security properties and metrics for logic encryption are defined based on the attacker’s capabilities. Furthermore, we will explain the different attacks and their countermeasures for logic encryption.
Original language | English (US) |
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Title of host publication | Hardware Protection through Obfuscation |
Publisher | Springer International Publishing |
Pages | 71-88 |
Number of pages | 18 |
ISBN (Electronic) | 9783319490199 |
ISBN (Print) | 9783319490182 |
DOIs | |
State | Published - Jan 1 2017 |
Keywords
- Combinational locking
- Hardware obfuscation
- IP piracy
- Key-guessing attacks
- Logic locking
- One-way random functions
- Output-guessing attacks
- Reverse engineering
- Untrusted test facility
ASJC Scopus subject areas
- General Engineering
- General Computer Science