Logic encryption: A fault analysis perspective

Jeyavijayan Rajendran, Youngok Pino, Ozgur Sinanoglu, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The globalization of Integrated Circuit (IC) design flow is making it easy for rogue elements in the supply chain to pirate ICs, overbuild ICs, and insert hardware trojans; the IC industry is losing approximately $4 billion annually [1], [2]. One way to protect the ICs from these attacks is to encrypt the design by inserting additional gates such that correct outputs are produced only when specific inputs are applied to these gates. The state-of-the-art logic encryption technique inserts gates randomly into the design [3] and does not necessarily ensure that wrong keys corrupt the outputs. Our technique ensures that wrong keys corrupt the outputs. We relate logic encryption to fault propagation analysis in IC testing and develop a fault analysis based logic encryption technique. This technique achieves 50% Hamming distance between the correct and wrong outputs (ideal case) when a wrong key is applied. Furthermore, this 50% Hamming distance target is achieved by using a smaller number of additional gates when compared to random logic encryption.

Original languageEnglish (US)
Title of host publicationProceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2012
Pages953-958
Number of pages6
StatePublished - May 24 2012
Event15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012 - Dresden, Germany
Duration: Mar 12 2012Mar 16 2012

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012
CountryGermany
CityDresden
Period3/12/123/16/12

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'Logic encryption: A fault analysis perspective'. Together they form a unique fingerprint.

  • Cite this

    Rajendran, J., Pino, Y., Sinanoglu, O., & Karri, R. (2012). Logic encryption: A fault analysis perspective. In Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2012 (pp. 953-958). [6176634] (Proceedings -Design, Automation and Test in Europe, DATE).