Abstract
We present a new low-cost concurrent checking method for the Advanced Encryption Standard (AES) encryption algorithm. In this method, the parity of the 128-bit input is determined and modified step-by-step into the parity of the 128-bit output according to the processing steps of the AES encryption. For the parity-preserving AES steps Shift-Rows and Mix-Column no parity modifications are necessary. The modified parity is compared in any round with the actual parity of the outputs of the round. To obtain the hardware costs we implemented this method on a Xilinx Virtex 1000 FPGA. For this implementation, the hardware overhead is about 8% and the additional time delay is about 5%. The method detects technical faults and deliberately injected faults during normal operation.
Original language | English (US) |
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Title of host publication | Proceedings - International Test Conference |
Pages | 1242-1248 |
Number of pages | 7 |
State | Published - 2004 |
Event | Proceedings - International Test Conference 2004 - Charlotte, NC, United States Duration: Oct 26 2004 → Oct 28 2004 |
Other
Other | Proceedings - International Test Conference 2004 |
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Country/Territory | United States |
City | Charlotte, NC |
Period | 10/26/04 → 10/28/04 |
ASJC Scopus subject areas
- General Engineering