MemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks

Muhammad Abdullah Hanif, Muhammad Zuhaib Akbar, Rehan Ahmed, Semeen Rehman, Axel Jantsch, Muhammad Shafique

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Generative Adversarial Networks (GANs) have gained importance because of their tremendous unsupervised learning capability and enormous applications in data generation, for example, text to image synthesis, synthetic medical data generation, video generation, and artwork generation. Hardware acceleration for GANs become challenging due to the intrinsic complex computational phases, which require efficient data management during the training and inference. In this work, we propose a distributed on-chip memory architecture, which aims at efficiently handling the data for complex computations involved in GANs, such as strided convolution or transposed convolution. We also propose a controller that improves the computational efficiency by pre-arranging the data from either the off-chip memory or the computational units before storing it in the on-chip memory. Our architectural enhancement supports to achieve 3.65x performance improvement in state-of-the-art, and reduces the number of read accesses and write accesses by 85% and 75%, respectively.

Original languageEnglish (US)
Title of host publicationInternational Symposium on Low Power Electronics and Design, ISLPED 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728129549
DOIs
StatePublished - Jul 2019
Event2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019 - Lausanne, Switzerland
Duration: Jul 29 2019Jul 31 2019

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2019-July
ISSN (Print)1533-4678

Conference

Conference2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019
Country/TerritorySwitzerland
CityLausanne
Period7/29/197/31/19

Keywords

  • DCGAN
  • DNN
  • GAN
  • Generative Adversarial Networks
  • Hardware Accelerator
  • Memory Architecture

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint

Dive into the research topics of 'MemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks'. Together they form a unique fingerprint.

Cite this