Micro-preemption synthesis: An enabling mechanism for multi-task VLSI systems

Kyosun Kim, Ramesh Karri, Miodrag Potkonjak

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register files must be preserved in order for the task to be resumed. This entails extra memory to save the context and additional clock cycles to restore the context. In this paper, we present techniques and algorithms to incorporate micro-preemption constraints during multi-task VLSI system synthesis. Specifically, we have developed: (i) algorithms to insert and refine preemption points in scheduled task graphs subject to preemption latency constraints, (ii) techniques to minimize the context switch overhead by considering the dedicated registers required to save the state of a task on preemption and the shared registers required to save the remaining values in the tasks, and (iii) a controller based scheme to preclude preemption related performance degradation.

Original languageEnglish (US)
Title of host publicationIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Editors Anon
PublisherIEEE Comp Soc
Pages33-38
Number of pages6
StatePublished - 1997
EventProceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD - San Jose, CA, USA
Duration: Nov 9 1997Nov 13 1997

Other

OtherProceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD
CitySan Jose, CA, USA
Period11/9/9711/13/97

ASJC Scopus subject areas

  • Software

Fingerprint Dive into the research topics of 'Micro-preemption synthesis: An enabling mechanism for multi-task VLSI systems'. Together they form a unique fingerprint.

Cite this