Mosaic Pages: Big TLB Reach with Small Pages

Jaehyun Han, Krishnan Gosakan, William Kuszmaul, Ibrahim N. Mubarek, Nirjhar Mukherjee, Karthik Sriram, Guido Tagliavini, Evan West, Michael A. Bender, Abhishek Bhattacharjee, Alex Conway, Martin Farach-Colton, Jayneel Gandhi, Rob Johnson, Sudarsun Kannan, Donald E. Porter

    Research output: Contribution to journalArticlepeer-review


    This article introduces mosaic pages, which increase TLB reach by compressing multiple, discrete translations into one TLB entry. Mosaic leverages virtual contiguity for locality, but does not use physical contiguity. Mosaic relies on recent advances in hashing theory to constrain memory mappings, in order to realize this physical address compression without reducing memory utilization or increasing swapping. Mosaic reduces TLB misses in several workloads by 6–81%. Our results show that Mosaic’s constraints on memory mappings do not harm performance, we never see conflicts before memory is 98% full in our experiments — at which point, a traditional design would also likely swap. Timing and area analyses on a commercial 28nm CMOS process indicate that the hashing required on the critical path can run at a maximum frequency of 4 GHz, indicating that a Mosaic TLB is unlikely to affect clock frequency.

    Original languageEnglish (US)
    Pages (from-to)1-8
    Number of pages8
    JournalIEEE Micro
    StateAccepted/In press - 2024


    • Clocks
    • Costs
    • Icebergs
    • Linux
    • Memory management
    • Resource management
    • Throughput

    ASJC Scopus subject areas

    • Software
    • Hardware and Architecture
    • Electrical and Electronic Engineering


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