Multicast FullHD H.264 Intra Video Encoder Architecture

Muhammad Usman Karim Khan, Muhammad Shafique, Lars Bauer, Jorg Henkel

Research output: Contribution to journalArticlepeer-review

Abstract

High throughput demands have resulted in enormous increase in complexity of multicast video applications, which require multiple video encoders to simultaneously compress individual views. In this paper, we present an approach to encode independent videos using H.264 intra encoder on a single hardware platform, where the hardware resources are shared by independent encoders in a time-multiplexed manner. In addition to lowering the latency introduced by multicasting, we address the strong sequential data dependencies within the encoder. At 25 frames/s, 150 MHz prototype of the proposed encoder and multiple video capture/display on a mid-range field programmable gate array is also presented.

Original languageEnglish (US)
Article number7128360
Pages (from-to)2049-2053
Number of pages5
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume34
Issue number12
DOIs
StatePublished - Dec 2015

Keywords

  • FPGA implementation
  • FullHD video encoder
  • H.264 encoder
  • hardware sharing
  • Multicast

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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