Multilevel selective harmonic elimination PWM technique in series-connected voltage inverters

L. Li, Dariusz Czarkowski, Y. Liu, P. Pillay

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Selected harmonic elimination PWM (SHEPWM) method is systematically applied for the first time to multilevel series-connected voltage source PWM inverters. The method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. Another less computationally demanding harmonic suppression technique, called a mirror surplus harmonic method, is proposed for five-level (double-cell) inverters. Theoretical results of both methods are verified by experiments and simulations for a double-cell inverter. Simulation results for a five-cell (11-level) inverter are also presented for the multilevel SHEPWM method.

Original languageEnglish (US)
Title of host publicationConference Record - IAS Annual Meeting (IEEE Industry Applications Society)
Editors Anon
PublisherIEEE
Pages1454-1461
Number of pages8
Volume2
StatePublished - 1998
EventProceedings of the 1998 IEEE Industry Applications Conference. Part 1 (of 3) - St.Louis, MO, USA
Duration: Oct 12 1998Oct 15 1998

Other

OtherProceedings of the 1998 IEEE Industry Applications Conference. Part 1 (of 3)
CitySt.Louis, MO, USA
Period10/12/9810/15/98

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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