Abstract
Selected harmonic elimination PWM (SHEPWM) method is systematically applied for the first time to multilevel series-connected voltage source PWM inverters. The method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. Another less computationally demanding harmonic suppression technique, called a mirror surplus harmonic method, is proposed for five-level (double-cell) inverters. Theoretical results of both methods are verified by experiments and simulations for a double-cell inverter. Simulation results for a five-cell (11-level) inverter are also presented for the multilevel SHEPWM method.
| Original language | English (US) |
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| Title of host publication | Conference Record - IAS Annual Meeting (IEEE Industry Applications Society) |
| Editors | Anon |
| Publisher | IEEE |
| Pages | 1454-1461 |
| Number of pages | 8 |
| Volume | 2 |
| State | Published - 1998 |
| Event | Proceedings of the 1998 IEEE Industry Applications Conference. Part 1 (of 3) - St.Louis, MO, USA Duration: Oct 12 1998 → Oct 15 1998 |
Other
| Other | Proceedings of the 1998 IEEE Industry Applications Conference. Part 1 (of 3) |
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| City | St.Louis, MO, USA |
| Period | 10/12/98 → 10/15/98 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering