MuxLink: Circumventing Learning-Resilient MUX-Locking Using Graph Neural Network-based Link Prediction

Lilas Alrahis, Satwik Patnaik, Muhammad Shafique, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Logic locking has received considerable interest as a prominent technique for protecting the design intellectual property from untrusted entities, especially the foundry. Recently, machine learning (ML)-based attacks have questioned the security guarantees of logic locking, and have demonstrated considerable success in deciphering the secret key without relying on an oracle, hence, proving to be very useful for an adversary in the fab. Such ML-based attacks have triggered the development of learning-resilient locking techniques. The most advanced state-of-the-art deceptive MUX-based locking (D-MUX) and the symmetric MUX-based locking techniques have recently demonstrated resilience against existing ML-based attacks. Both defense techniques obfuscate the design by inserting key-controlled MUX logic, ensuring that all the secret inputs to the MUXes are equiprobable. In this work, we show that these techniques primarily introduce local and limited changes to the circuit without altering the global structure of the design. By leveraging this observation, we propose a novel graph neural network (GNN)-based link prediction attack, MuxLink, that successfully breaks both the D-MUX and symmetric MUX-locking techniques, relying only on the underlying structure of the locked design, i.e., in an oracle-less setting. Our trained GNN model learns the structure of the given circuit and the composition of gates around the non-obfuscated wires, thereby generating meaningful link embeddings that help decipher the secret inputs to the MUXes. The proposed MuxLink achieves key prediction accuracy and precision up to 100% on D-MUX and symmetric MUX-locked ISCAS-85 and ITC-99 benchmarks, fully unlocking the designs. We open-source MuxLink [1].

Original languageEnglish (US)
Title of host publicationProceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022
EditorsCristiana Bolchini, Ingrid Verbauwhede, Ioana Vatajelu
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages694-699
Number of pages6
ISBN (Electronic)9783981926361
DOIs
StatePublished - 2022
Event2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022 - Virtual, Online, Belgium
Duration: Mar 14 2022Mar 23 2022

Publication series

NameProceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022

Conference

Conference2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022
Country/TerritoryBelgium
CityVirtual, Online
Period3/14/223/23/22

Keywords

  • Deceptive Logic Locking
  • Graph Neural Networks
  • Link Prediction
  • Machine Learning
  • Oracle-less Attack

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computer Networks and Communications
  • Hardware and Architecture
  • Software
  • Safety, Risk, Reliability and Quality
  • Control and Optimization

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