On design vulnerability analysis and trust benchmarks development

Hassan Salmani, Mohammad Tehranipoor, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The areas of hardware security and trust have experienced major growth over the past several years. However, research in Trojan detection and prevention lacks standard benchmarks and measurements, resulting in inconsistent research outcomes, and ambiguity in analyzing strengths and weaknesses in the techniques developed by different research teams and their advancements to the state-of-the-art. We have developed innovative methodologies that, for the first time, more effectively address the problem. We have developed a vulnerability analysis flow. The flow determines hard-to-detect areas in a circuit that would most probably be used for Trojan implementation to ensure a Trojan goes undetected during production test and extensive functional test analysis. Furthermore, we introduce the Trojan detectability metric to quantify Trojan activation and effect. This metric offers a fair comparison for analyzing weaknesses and strengths of Trojan detection techniques. Using these methodologies, we have developed a large number of trust benchmarks that are available for use by the public, as well as researchers and practitioners in the field.

Original languageEnglish (US)
Title of host publication2013 IEEE 31st International Conference on Computer Design, ICCD 2013
PublisherIEEE Computer Society
Pages471-474
Number of pages4
ISBN (Print)9781479929870
DOIs
StatePublished - 2013
Event2013 IEEE 31st International Conference on Computer Design, ICCD 2013 - Asheville, NC, United States
Duration: Oct 6 2013Oct 9 2013

Publication series

Name2013 IEEE 31st International Conference on Computer Design, ICCD 2013

Other

Other2013 IEEE 31st International Conference on Computer Design, ICCD 2013
Country/TerritoryUnited States
CityAsheville, NC
Period10/6/1310/9/13

ASJC Scopus subject areas

  • Computer Graphics and Computer-Aided Design
  • Hardware and Architecture

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