On Improving the Security of Logic Locking

Muhammad Yasin, Jeyavijayan Jv Rajendran, Ozgur Sinanoglu, Ramesh Karri

Research output: Contribution to journalArticlepeer-review


Due to globalization of integrated circuit (IC) design flow, rogue elements in the supply chain can pirate ICs, overbuild ICs, and insert hardware Trojans. EPIC locks the design by randomly inserting additional gates; only a correct key makes the design to produce correct outputs. We demonstrate that an attacker can decipher the locked netlist, in a time linear to the number of keys, by sensitizing the key-bits to the output. We then develop techniques to fix this vulnerability and make an attacker's effort truly exponential in the number of inserted keys. We introduce a new security metric and a method to deliver strong logic locking.

Original languageEnglish (US)
Article number7362173
Pages (from-to)1411-1424
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number9
StatePublished - Sep 2016


  • Design for trust
  • IP protection
  • hardware security
  • intellectual property (IP) piracy
  • logic encryption

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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