TY - JOUR
T1 - On the combined input-crosspoint buffered switch with round-robin arbitration
AU - Rojas-Cessa, Roberto
AU - Oki, Eiji
AU - Chao, H. Jonathan
N1 - Funding Information:
Paper approved by M. Hamdi, the Editor for Network Architecture of the IEEE Communications Society. Manuscript received August 10, 2003; revised April 10, 2005. This work was supported in part by the National Science Foundation under Awards 0435250, 0423305, and 0435303. This paper was presented in part at the IEEE Workshop on High-Performance Switches and Routers, Dallas, TX, May 2001.
PY - 2005/11
Y1 - 2005/11
N2 - Input-buffered switches have been widely considered for implementing feasible packet switches. However, their matching process may not be time-efficient for switches with high-speed ports. Buffered crossbars (BXs) are an alternative to relax timing for packet switches with high-speed ports and to provide high-performance switching. BX switches were originally considered expensive, as the memory amount required in the crosspoints (XPs) is proportional to the square of the number of ports (O(N2)). This limitation is now less stringent with the advances on chip-fabrication techniques, and when considering small crosspoint (XP) buffer sizes. In this paper, we study a combined input-crosspoint buffered packet switch, named CIXB, with virtual output queues (VOQs) at the inputs, and arbitration based on round-robin selection. We show that the CIXB switch achieves 100% throughput under uniform traffic, and high performance under nonuniform traffic, using one-cell XP buffer size and no speedup.
AB - Input-buffered switches have been widely considered for implementing feasible packet switches. However, their matching process may not be time-efficient for switches with high-speed ports. Buffered crossbars (BXs) are an alternative to relax timing for packet switches with high-speed ports and to provide high-performance switching. BX switches were originally considered expensive, as the memory amount required in the crosspoints (XPs) is proportional to the square of the number of ports (O(N2)). This limitation is now less stringent with the advances on chip-fabrication techniques, and when considering small crosspoint (XP) buffer sizes. In this paper, we study a combined input-crosspoint buffered packet switch, named CIXB, with virtual output queues (VOQs) at the inputs, and arbitration based on round-robin selection. We show that the CIXB switch achieves 100% throughput under uniform traffic, and high performance under nonuniform traffic, using one-cell XP buffer size and no speedup.
KW - Buffered crossbar
KW - Credit-based flow control
KW - Crosspoint-buffered switch
KW - Round-robin arbitration
KW - Virtual output queue
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U2 - 10.1109/TCOMM.2005.858667
DO - 10.1109/TCOMM.2005.858667
M3 - Article
AN - SCOPUS:28844469966
SN - 0090-6778
VL - 53
SP - 1945
EP - 1951
JO - IEEE Transactions on Communications
JF - IEEE Transactions on Communications
IS - 11
ER -