On the power management of simultaneous multithreading processors

Ahmed Youssef; Mohamed Zahran; Mohab Anis; Mohamed Elmasry

doi:10.1109/TVLSI.2009.2020727

On the power management of simultaneous multithreading processors

Ahmed Youssef, Mohamed Zahran, Mohab Anis, Mohamed Elmasry

Computer Science

Research output: Contribution to journal › Article › peer-review

Abstract

Simultaneous multithreading (SMT) processors are widely used in high performance computing tasks. However, with the improved performance of the SMT architecture, the utilization of their functional units is significantly increased, straining the power budget of the processor. This increases not only the dynamic power consumption, but also the leakage power consumption due to the increased temperature. In this paper, a comparison of the static and dynamic sleep signal generation techniques for SMT processors is presented. This is conducted under various workloads to assess their effectiveness in leakage power management. Results show that the dynamic approach exhibits a threefold increase in leakage savings, compared with that of the static approach for certain functional units.

Original language	English (US)
Article number	5272479
Pages (from-to)	1243-1248
Number of pages	6
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	18
Issue number	8
DOIs	https://doi.org/10.1109/TVLSI.2009.2020727
State	Published - Aug 2010

Keywords

Computer architecture
power consumption
prediction methods

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/TVLSI.2009.2020727

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@article{54c3b5956c4e48b491d68c9d065faf8b,

title = "On the power management of simultaneous multithreading processors",

abstract = "Simultaneous multithreading (SMT) processors are widely used in high performance computing tasks. However, with the improved performance of the SMT architecture, the utilization of their functional units is significantly increased, straining the power budget of the processor. This increases not only the dynamic power consumption, but also the leakage power consumption due to the increased temperature. In this paper, a comparison of the static and dynamic sleep signal generation techniques for SMT processors is presented. This is conducted under various workloads to assess their effectiveness in leakage power management. Results show that the dynamic approach exhibits a threefold increase in leakage savings, compared with that of the static approach for certain functional units.",

keywords = "Computer architecture, power consumption, prediction methods",

author = "Ahmed Youssef and Mohamed Zahran and Mohab Anis and Mohamed Elmasry",

year = "2010",

month = aug,

doi = "10.1109/TVLSI.2009.2020727",

language = "English (US)",

volume = "18",

pages = "1243--1248",

journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",

issn = "1063-8210",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "8",

}

TY - JOUR

T1 - On the power management of simultaneous multithreading processors

AU - Youssef, Ahmed

AU - Zahran, Mohamed

AU - Anis, Mohab

AU - Elmasry, Mohamed

PY - 2010/8

Y1 - 2010/8

N2 - Simultaneous multithreading (SMT) processors are widely used in high performance computing tasks. However, with the improved performance of the SMT architecture, the utilization of their functional units is significantly increased, straining the power budget of the processor. This increases not only the dynamic power consumption, but also the leakage power consumption due to the increased temperature. In this paper, a comparison of the static and dynamic sleep signal generation techniques for SMT processors is presented. This is conducted under various workloads to assess their effectiveness in leakage power management. Results show that the dynamic approach exhibits a threefold increase in leakage savings, compared with that of the static approach for certain functional units.

AB - Simultaneous multithreading (SMT) processors are widely used in high performance computing tasks. However, with the improved performance of the SMT architecture, the utilization of their functional units is significantly increased, straining the power budget of the processor. This increases not only the dynamic power consumption, but also the leakage power consumption due to the increased temperature. In this paper, a comparison of the static and dynamic sleep signal generation techniques for SMT processors is presented. This is conducted under various workloads to assess their effectiveness in leakage power management. Results show that the dynamic approach exhibits a threefold increase in leakage savings, compared with that of the static approach for certain functional units.

KW - Computer architecture

KW - power consumption

KW - prediction methods

UR - http://www.scopus.com/inward/record.url?scp=77955174917&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77955174917&partnerID=8YFLogxK

U2 - 10.1109/TVLSI.2009.2020727

DO - 10.1109/TVLSI.2009.2020727

M3 - Article

AN - SCOPUS:77955174917

SN - 1063-8210

VL - 18

SP - 1243

EP - 1248

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IS - 8

M1 - 5272479

ER -

On the power management of simultaneous multithreading processors

Abstract

Keywords

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