Optimal Parameter Design of DAC-based Sinusoidal Signal Generators for Electrical Impedance Spectroscopy

This paper provides parameter optimization processes of sinusoidal signal generators (SSGs) based on a digital-to-analog converter (DAC) for electrical impedance spectroscopy (EIS) applications. The SSG, which is the most power-hungry building block in EIS systems, generates a sinusoidal signal by using a DAC. To achieve high accuracy for the overall EIS system, high linearity is required for the sinusoidal signal. Thus, the SSG&#x2019;s DAC is typically operated with a high oversampling ratio (OSR) and a large number of quantization levels (<italic>L_DAC</italic>) at the expense of increased power consumption, large area, and high complexity. For efficient use of the power and area in the SSG, it is necessary to optimize the OSR, <italic>L_DAC</italic>, and the order of the low-pass filter (<italic>N_LPF</italic>). In this paper, optimal design parameters of SSGs, which can achieve highly accurate EIS systems with low complexity, are presented. First, the minimum OSR and <italic>N_LPF</italic> for lowering the magnitude error to less than 0.1% are presented. Then, optimal quantization levels of finite-resolution DACs are found for sufficient accuracy and harmonic tones. In addition, the accuracy and harmonics of odd-number OSR cases are analyzed and compared with even-number OSR cases. According to the results, it is possible to design an SSG that only differs from the ideal sinusoidal signal by approximately 0.1% by using OSR &#x2264; 32, <italic>N_LPF</italic> &#x2264; 2, and <italic>L_DAC</italic> &#x2264; 256.