Parallel computing heuristics for low-rank matrix completion

Charlie Hubbard; Chinmay Hegde

doi:10.1109/GlobalSIP.2017.8309063

Parallel computing heuristics for low-rank matrix completion

Charlie Hubbard, Chinmay Hegde

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Current algorithms for low-rank matrix completion often suffer from scalability issues - both in terms of memory as well as running time - when presented with very large datasets. In this paper, we introduce new parallel computing heuristics that can greatly accelerate matrix completion algorithms when used in GPU-based computing environments. Our heuristics enable speeding up popular algorithms for nonlinear matrix completion on standard real-world test datasets by orders of magnitude, while being highly memory-efficient.

Original language	English (US)
Title of host publication	2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	764-768
Number of pages	5
ISBN (Electronic)	9781509059904
DOIs	https://doi.org/10.1109/GlobalSIP.2017.8309063
State	Published - Mar 7 2018
Event	5th IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Montreal, Canada Duration: Nov 14 2017 → Nov 16 2017

Publication series

Name	2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings
Volume	2018-January

Other

Other	5th IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017
Country/Territory	Canada
City	Montreal
Period	11/14/17 → 11/16/17

ASJC Scopus subject areas

Information Systems
Signal Processing

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10.1109/GlobalSIP.2017.8309063

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Hubbard, C., & Hegde, C. (2018). Parallel computing heuristics for low-rank matrix completion. In 2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings (pp. 764-768). (2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings; Vol. 2018-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/GlobalSIP.2017.8309063

Parallel computing heuristics for low-rank matrix completion. / Hubbard, Charlie; Hegde, Chinmay.
2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. p. 764-768 (2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings; Vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Hubbard, C & Hegde, C 2018, Parallel computing heuristics for low-rank matrix completion. in 2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings. 2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings, vol. 2018-January, Institute of Electrical and Electronics Engineers Inc., pp. 764-768, 5th IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017, Montreal, Canada, 11/14/17. https://doi.org/10.1109/GlobalSIP.2017.8309063

Hubbard C, Hegde C. Parallel computing heuristics for low-rank matrix completion. In 2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2018. p. 764-768. (2017 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 - Proceedings). doi: 10.1109/GlobalSIP.2017.8309063

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author = "Charlie Hubbard and Chinmay Hegde",

note = "Funding Information: Acknowledgements. This work was supported in part by grant #CCF-1566281 from the National Science Foundation and a GPU grant from NVIDIA. Publisher Copyright: {\textcopyright} 2017 IEEE.; 5th IEEE Global Conference on Signal and Information Processing, GlobalSIP 2017 ; Conference date: 14-11-2017 Through 16-11-2017",

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Parallel computing heuristics for low-rank matrix completion

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