TY - GEN
T1 - Parallel memristors
T2 - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
AU - Rajendran, Jeyavijayan
AU - Karri, Ramesh
AU - Rose, Garrett S.
PY - 2011
Y1 - 2011
N2 - Memristors are employed by a wide variety of applications such as neural networks, memory and digital logic. However, the process variation effects of memristors may affect these applications. In this research, we consider the effect of process variations in the thickness of the oxide layer of memristors that are used in Memristor-based Threshold Logic (MTL) gates. As the effect of variations is less pronounced in high memristance values, a variation tolerant design without any degradation in speed is achieved by having a number of high memristance devices in parallel (redundancy factor). We propose an algorithm for the MTL gates to determine the number of memristors in parallel and the variation-minimal high memristance state. A power optimization algorithm is also proposed to map gates in a design using different libraries that have different performance characteristics. Finally, we present the power, delay performance and also the redundancy factor of memristors for various benchmark circuits.
AB - Memristors are employed by a wide variety of applications such as neural networks, memory and digital logic. However, the process variation effects of memristors may affect these applications. In this research, we consider the effect of process variations in the thickness of the oxide layer of memristors that are used in Memristor-based Threshold Logic (MTL) gates. As the effect of variations is less pronounced in high memristance values, a variation tolerant design without any degradation in speed is achieved by having a number of high memristance devices in parallel (redundancy factor). We propose an algorithm for the MTL gates to determine the number of memristors in parallel and the variation-minimal high memristance state. A power optimization algorithm is also proposed to map gates in a design using different libraries that have different performance characteristics. Finally, we present the power, delay performance and also the redundancy factor of memristors for various benchmark circuits.
UR - http://www.scopus.com/inward/record.url?scp=79960876755&partnerID=8YFLogxK
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U2 - 10.1109/ISCAS.2011.5938047
DO - 10.1109/ISCAS.2011.5938047
M3 - Conference contribution
AN - SCOPUS:79960876755
SN - 9781424494736
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 2241
EP - 2244
BT - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
Y2 - 15 May 2011 through 18 May 2011
ER -