TY - JOUR
T1 - Peal:Probabilistic Error Analysis Methodology for Low-power Approximate Adders
AU - Ayub, Muhammad Kamran
AU - Hanif, Muhammad Abdullah
AU - Hasan, Osman
AU - Shafique, Muhammad
N1 - Funding Information:
∗These two authors contributed equally. This work was partially supported by the Erasmus+ International Credit Mobility (Grant No. KA107). Authors’ addresses: M. K. Ayub, Senior TSE, National Instruments (NI), Measurement House, London Rd, Newbury RG14 2PZ, United Kingdom; email: [email protected]; M. A. Hanif and M. Shafique, Vienna University of Technology, Institute of Computer Engineering, Embedded Computing Systems, Treitlstraße 3, 1040 Wien, Österreich; emails: [email protected], [email protected]; O. Hasan, School of Electrical Engineering & Computer Science (SEECS), National University of Sciences & Technology (NUST), Sector H-12, Islamabad 44000, Pakistan; email: [email protected]. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]. © 2020 Association for Computing Machinery. 1550-4832/2020/10-ART1 $15.00 https://doi.org/10.1145/3405430
Publisher Copyright:
© 2020 ACM.
PY - 2020/12
Y1 - 2020/12
N2 - Approximate computing has emerged as an efficient design approach for applications with inherent error resilience. Low-power approximate adders (LPAAs), for instance, IMPACT and InXA, are beingadvocated as building blocks for approximate computing hardware. For their practical adoption, the error caused by these units needs to be pre-evaluated and compared with maximum allowable error bounds for an application. To address this problem, we present PEAL, a Probabilistic error analysis methodology for Low-power Approximate Single and Multi-layered Adder Architectures, while consideringvariable probabilities for each bit of input operands for a given multi-bit adder design. PEAL is highly generic, linearly scalable, and applicable to any adder type. The analysis provides probability of success, which is accurate for single-layered adder architectures and provides a lower bound for multi-layered architectures. We have shown that state-of-the-art LPAAs can serve as effective building blocks of approximate computing only when the input probabilities are either very high (>0.8) or very low (<0.2). Interestingly, none of the state-of-the-art LPAA units, which to the best of our knowledge are the most widely adopted, has demonstrated effectiveness for mid-range probabilities (0.3-0.7). We have also analytically explained the cause of this usability limitation andproposed its solution. Moreover, we have proposed a method for estimating the Mean-squared Error ofdatapaths composed of LPAAs, to quantify the magnitude of error introduced in the output due to approximation of the adder units.
AB - Approximate computing has emerged as an efficient design approach for applications with inherent error resilience. Low-power approximate adders (LPAAs), for instance, IMPACT and InXA, are beingadvocated as building blocks for approximate computing hardware. For their practical adoption, the error caused by these units needs to be pre-evaluated and compared with maximum allowable error bounds for an application. To address this problem, we present PEAL, a Probabilistic error analysis methodology for Low-power Approximate Single and Multi-layered Adder Architectures, while consideringvariable probabilities for each bit of input operands for a given multi-bit adder design. PEAL is highly generic, linearly scalable, and applicable to any adder type. The analysis provides probability of success, which is accurate for single-layered adder architectures and provides a lower bound for multi-layered architectures. We have shown that state-of-the-art LPAAs can serve as effective building blocks of approximate computing only when the input probabilities are either very high (>0.8) or very low (<0.2). Interestingly, none of the state-of-the-art LPAA units, which to the best of our knowledge are the most widely adopted, has demonstrated effectiveness for mid-range probabilities (0.3-0.7). We have also analytically explained the cause of this usability limitation andproposed its solution. Moreover, we have proposed a method for estimating the Mean-squared Error ofdatapaths composed of LPAAs, to quantify the magnitude of error introduced in the output due to approximation of the adder units.
KW - Low power
KW - accuracy
KW - adder
KW - analysis
KW - data path
KW - error
KW - error propagation
KW - magnitude
KW - methodology
KW - multi-layered
KW - performance
KW - quality efficiency
KW - scalability
KW - statistics
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U2 - 10.1145/3405430
DO - 10.1145/3405430
M3 - Article
AN - SCOPUS:85099363389
SN - 1550-4832
VL - 17
JO - ACM Journal on Emerging Technologies in Computing Systems
JF - ACM Journal on Emerging Technologies in Computing Systems
IS - 1
M1 - 1
ER -