Physics-based compact models of transistors play two complementary roles. First, they establish an analytical mathematical description of the device, which helps interpret measurements or detailed simulations and make predictions; second, they form the basis of models used in circuit simulators. Historically, as Si MOSFETs matured, the value of compact models in understanding devices, which was preeminent fifty years ago when such models were first developed, diminished and "compact models" became synonymous with circuit simulation models with the emphasis shifting to the faithful reproduction of fitted data, often at the expense of the solid physics underpinnings of at least some of the model equations and parameters. More recently, as silicon MOSFETs started approaching quasi-ballistic (QB) operation and new channel materials have emerged, interest has shifted back to physics-based models for exploring the limits of nanoscale FET performance [1-2]. In this paper, we argue that the key to the usefulness of such physics-based compact models is strict minimization of the number of model parameters, while still maintaining the capability to embed the model in a circuit simulator. We do this by using the VS compact model  for FETs and its adaptation to materials beyond silicon as example. While originally developed for silicon nanotransistors, the MIT Virtual Source (MVS) model has evolved considerably to describe transport in a variety of channel materials (carbon nanotubes, graphene, GaN, InGaAs) and device topologies (bulk-Si, ETSOI MOSFETs, III-V and III-N HEMTs.) With only a limited number of parameters, most of which are physical and can be extracted through device characterization, the MVS model is especially attractive for test-driving new devices in a relatively straightforward manner and also for technology benchmarking.