Polymorphic spintronic logic gates for hardware security primitives-Device design and performance benchmarking

This paper presents polymorphic logic gates for hardware security using giant spin Hall effect (GSHE) devices in which electron spin is the information token. Compared to existing CMOS (charge-based) IP protection and camouflaging security techniques, the proposed GSHE logic offers significant reduction in implementation area as well as power dissipation. Based on the Monte-Carlo simulation of stochastic Landau Lifshitz Gilbert Slonczewski (s-LLGS) equation governing the GSHE dynamics, physical models of delay, energy-per-bit, and power dissipation are developed for GSHE standard cells including inverter, NAND, NOR, and XOR gate. We note that the proposed GSHE polymorphic logic can implement majority function by simply reversing the voltage polarity on the gate terminals. The same layout structure implements complex logic functions by selecting the appropriate polarity of a control signal. As such, it offers post-fabrication reconfigurability options to implement evolvable and intelligent hardware.