TY - GEN
T1 - Power-efficient load-balancing on heterogeneous computing platforms
AU - Khan, Muhammad Usman Karim
AU - Shafique, Muhammad
AU - Gupta, Apratim
AU - Schumann, Thomas
AU - Henkel, Jörg
N1 - Publisher Copyright:
© 2016 EDAA.
Copyright:
Copyright 2016 Elsevier B.V., All rights reserved.
PY - 2016/4/25
Y1 - 2016/4/25
N2 - In order to address the throughput constraints of the system at minimal power consumption, the workload of computing nodes should be balanced. This requires accounting for the underlying hardware characteristics and throughput sustainable by these nodes. This work provides a workload distribution and balancing methodology of a divisible load under a throughput constraint, on heterogeneous nodes. The power efficiency of each node is considered during load distribution. For load balancing, the frequency of the node is determined which just fulfills the timing requirement. Compared to a state-of-the-art-scheme, our scheme results in up to 64% performance improvement for the benchmarks evaluated in this paper.
AB - In order to address the throughput constraints of the system at minimal power consumption, the workload of computing nodes should be balanced. This requires accounting for the underlying hardware characteristics and throughput sustainable by these nodes. This work provides a workload distribution and balancing methodology of a divisible load under a throughput constraint, on heterogeneous nodes. The power efficiency of each node is considered during load distribution. For load balancing, the frequency of the node is determined which just fulfills the timing requirement. Compared to a state-of-the-art-scheme, our scheme results in up to 64% performance improvement for the benchmarks evaluated in this paper.
KW - DVFS
KW - Hardware Accelerator
KW - Heterogeneous Computing
KW - Load Balancing
KW - Power-Efficiency
UR - http://www.scopus.com/inward/record.url?scp=84973618674&partnerID=8YFLogxK
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M3 - Conference contribution
AN - SCOPUS:84973618674
T3 - Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
SP - 1469
EP - 1472
BT - Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
Y2 - 14 March 2016 through 18 March 2016
ER -