@inproceedings{46b7735ca480405a97f7dbe9d8ee0f58,
title = "Power optimization for universal hash function data path using divide-and-concatenate technique",
abstract = "We present an architecture level low power design technique called divide-and-concatenate for universal hash functions based on the following observations: (i) the power consumption of a w-bit array multiplier and associated universal hash data path decreases as O(w4) if its clock rate remains constant, (ii) two universal hash functions are equivalent if they have the same collision probability property. In the proposed approach we divide a w-bit data path (with collision probability 2-w) into two/four w/2-bit data paths (each with collision probability 2-w/2) and concatenate their results to construct an equivalent w-bit data path (with a collision probability 2-w). A popular low power technique that uses parallel data paths saves 62.10% dynamic power consumption incurring 102% area overhead. In contrast, the divide-and-concatenate technique saves 55.44% dynamic power consumption with only 16% area overhead.",
keywords = "Divide-and-Concatenate, Power Optimization, Universal Hash Function",
author = "Bo Yang and Ramesh Karri",
year = "2005",
doi = "10.1145/1084834.1084891",
language = "English (US)",
isbn = "1595931619",
series = "CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis",
publisher = "Association for Computing Machinery (ACM)",
pages = "219--224",
booktitle = "CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis",
address = "United States",
note = "3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis CODES+ISSS 2005 ; Conference date: 18-09-2005 Through 21-09-2005",
}