Abstract
We develop an approach to minimizing power consumption of portable wireless DSP applications using a set of compilation and architectural techniques. The key technical innovation is a novel divide-and-conquer compilation technique to minimize the number of operations for general DSP computations. Our technique optimizes not only a significantly wider set of computations than the previously published techniques, but also outperforms (or performs at least as well as other techniques) on all examples. Along the architectural dimension, we investigate coordinated impact of compilation techniques on the number of processors which provide optimal trade-off between cost and power. We demonstrate that proper compilation techniques can significantly reduce power with bounded hardware cost. The effectiveness of all techniques and algorithms is documented on numerous real-life designs.
| Original language | English (US) |
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| Title of host publication | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers |
| Editors | Anon |
| Publisher | IEEE Comp Soc |
| Pages | 108-111 |
| Number of pages | 4 |
| State | Published - 1997 |
| Event | Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD - San Jose, CA, USA Duration: Nov 9 1997 → Nov 13 1997 |
Other
| Other | Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD |
|---|---|
| City | San Jose, CA, USA |
| Period | 11/9/97 → 11/13/97 |
ASJC Scopus subject areas
- Software