Abstract
Side-channel attacks have empowered bypassing of cryptographic components in circuits. Power side-channel (PSC) attacks have received particular traction, owing to their noninvasiveness and proven effectiveness. Aside from prior art focused on conventional technologies, this is the first work to investigate the emerging negative capacitance transistor (NCFET) technology in the context of PSC attacks. We implement a CAD flow for the PSC evaluation at design time. It leverages industry-standard design tools, while also employing the widely accepted correlation power analysis (CPA) attack. Using standard-cell libraries based on the 7-nm FinFET technology for NCFET and its counterpart CMOS setup, our evaluation reveals that NCFET-based circuits are more resilient to the classical CPA attack, due to the considerable effect of negative capacitance on the switching power. We also demonstrate that the thicker the ferroelectric layer, the higher the resiliency of the NCFET-based circuit, which opens new doors for optimization and tradeoffs.
Original language | English (US) |
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Article number | 9131868 |
Pages (from-to) | 74-84 |
Number of pages | 11 |
Journal | IEEE Micro |
Volume | 40 |
Issue number | 6 |
DOIs | |
State | Published - Nov 1 2020 |
Keywords
- Beyond CMOS
- CAD for Security
- Correlation power analysis (CPA)
- Emerging technology
- Ferroelectric
- NCFET
- Negative capacitance
- Power side channel (PSC)
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering