Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET)

Side-channel attacks have empowered bypassing of cryptographic components in circuits. Power side-channel (PSC) attacks have received particular traction, owing to their non-invasiveness and proven effectiveness. Aside from prior art focused on conventional technologies, this is the first work to investigate the emerging Negative Capacitance Transistor (NCFET) technology in the context of PSC attacks. We implement a CAD flow for PSC evaluation at design-time. It leverages industry-standard design tools, while also employing the widely-accepted correlation power analysis (CPA) attack. Using standard-cell libraries at 7nm FinFET technology for both NCFET technology and its counterpart CMOS technology, our evaluation reveals that NCFET-based circuits are more resilient to the CPA attacks. This is due to the considerable effect of negative capacitance on the dynamic power. We also demonstrate that the thicker the ferroelectric layer, the higher the resiliency of the NCFET-based circuit against PSC attacks, which opens new doors for optimization and trade-offs.