Pre-SAT Logic Locking

Muhammad Yasin, Jeyavijayan (Jv) Rajendran, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingChapter


This chapter focuses on the Pre-SAT logic locking, presenting three techniques, RLL, FLL, and SLL, in addition to describing the sensitization attack. RLL is the earliest known logic locking technique that was introduced to thwart IC piracy. FLL improves upon RLL and prevents the black-box usage of an IC. However, both RLL and FLL remain susceptible to the sensitization attack, which retrieves the key bits from a functional IC in a divide-and-conquer fashion. SLL thwarts the sensitization attack by inserting key gates that exhibit strong interference among themselves and make it hard to retrieve key bits on an individual basis. This chapter is about the Pre-SAT logic locking techniques. Section 3.1 introduces RLL, the first-ever logic locking technique. Section 3.2 describes FLL, which improves upon RLL to prevent the black-box usage of an IC. Section 3.3 focuses on the sensitization attack, the first algorithmic attack on logic locking. Section 3.3 presents SLL as a countermeasure to the sensitization attack.

Original languageEnglish (US)
Title of host publicationAnalog Circuits and Signal Processing
Number of pages14
StatePublished - 2020

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Information Systems
  • Signal Processing

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