TY - GEN
T1 - Reconfigurable Concurrent Error Detection adaptive to dynamicity of power constraints
AU - Almukhaizim, Sobeeh
AU - Bunian, Sara
AU - Sinanoglu, Ozgur
PY - 2010
Y1 - 2010
N2 - In this preliminary study, we evaluate a reconfigurable low-power duplication-based Concurrent Error Detection (CED) infrastructure for logic circuits. The key idea is to enable/disable the operation of the duplicate circuit, resulting in the retention of the input values to the duplicate circuit (i.e., reduction in power dissipation) at the cost of some reduction in CED coverage. The results indicate that power dissipation is commensurate with CED coverage, motivating the use of LFSR structures to easily generate and reconfigure conditions, enabling their dynamic adjustment to adapt to the power constraints of the system.
AB - In this preliminary study, we evaluate a reconfigurable low-power duplication-based Concurrent Error Detection (CED) infrastructure for logic circuits. The key idea is to enable/disable the operation of the duplicate circuit, resulting in the retention of the input values to the duplicate circuit (i.e., reduction in power dissipation) at the cost of some reduction in CED coverage. The results indicate that power dissipation is commensurate with CED coverage, motivating the use of LFSR structures to easily generate and reconfigure conditions, enabling their dynamic adjustment to adapt to the power constraints of the system.
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U2 - 10.1109/ETSYM.2010.5512745
DO - 10.1109/ETSYM.2010.5512745
M3 - Conference contribution
AN - SCOPUS:78049290952
SN - 9781424458356
T3 - 2010 15th IEEE European Test Symposium, ETS'10
SP - 248
BT - 2010 15th IEEE European Test Symposium, ETS'10
T2 - 2010 15th IEEE European Test Symposium, ETS'10
Y2 - 24 May 2010 through 28 May 2010
ER -