Reconfigurable low-power Concurrent Error Detection in logic circuits

Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Concurrent Error Detection (CED) methods provide some level of error detection capability at the cost of some area and power overhead. In many portable devices, however, the error detection capability must be reconfigured dynamically, in order to optimize the available power budget according to the criticality of the processed data. In this work, we propose a reconfigurable duplication-based CED infrastructure for logic circuits. The key idea is to enable/disable the operation of the duplicate circuit according to a set of control conditions. When CED is disabled, the inputs to the duplicate circuit retain their previous values (i.e., reduction in power dissipation via elimination of switching activity), yet errors are not detected (i.e., reduction in CED coverage). Experimental results using judicious and random selection of control conditions yield the same end-result; power dissipation is commensurate with CED coverage. Therefore, LFSR structures can be used to easily generate and reconfigure conditions, enabling their dynamic adjustment to adapt to the power constraints of the system.

Original languageEnglish (US)
Title of host publicationProceedings of the 2010 IEEE 16th International On-Line Testing Symposium, IOLTS 2010
Pages206-207
Number of pages2
DOIs
StatePublished - 2010
Event16th IEEE International On-Line Testing Symposium, IOLTS 2010 - Corfu Island, Greece
Duration: Jul 5 2010Jul 7 2010

Publication series

NameProceedings of the 2010 IEEE 16th International On-Line Testing Symposium, IOLTS 2010

Other

Other16th IEEE International On-Line Testing Symposium, IOLTS 2010
CountryGreece
CityCorfu Island
Period7/5/107/7/10

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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