Register transfer level concurrent error detection in elliptic curve crypto implementations

Richard Stern, Nikhil Joshi, Kaijie Wu, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper we present an Register Transfer Level (RTL) Concurrent Error Detection (CED) technique targeting hardware implementations of Elliptic Curve Cryptography (ECC). The proposed mixed hardware-and time-redundancy based CED techniques use the mathematical properties of the underlying Galois Field as well as the ECC primitives to detect both soft errors and permanent faults with low area overhead. Results for sequential implementations of GF multiplication and inverse operations yielded an area overhead of 30% and a time overhead of 120%.

Original languageEnglish (US)
Title of host publicationProceedings Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2007
Pages112-119
Number of pages8
DOIs
StatePublished - 2007
Event4th International Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2007 - Vienna, Austria
Duration: Sep 10 2007Sep 10 2007

Publication series

NameProceedings Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2007

Other

Other4th International Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2007
CountryAustria
CityVienna
Period9/10/079/10/07

ASJC Scopus subject areas

  • Information Systems
  • Control and Systems Engineering

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