Abstract
We propose multiple reliability-driven software transformations targeting unreliable hardware. These transformations reduce the executions of critical instructions and spatial/temporal vulnerabilities of different instructions with respect to different processor components. The goal is to lower the application's susceptibility toward failures. Compared to performance-optimized compilation, our method incurs 60% lower application failures, averaged over various fault injection scenarios and fault rates.
Original language | English (US) |
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Article number | 6932563 |
Pages (from-to) | 1597-1610 |
Number of pages | 14 |
Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Volume | 33 |
Issue number | 11 |
DOIs | |
State | Published - Nov 1 2014 |
Keywords
- Compiler
- fault tolerance
- reliability
- reliable software
- soft errors
- software transformations
ASJC Scopus subject areas
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering